H. T. Vergos - Professor

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SoC Design & Test

R + D Projects

"SOC Design and Test" - C. Caratheodory's Program

This program was financialy supported by the Research Committee of the University of Patras, to honor the memory of C. Caratheodory.

Its aim was to analyze the testing problems of intellectual property blocks (IPs / cores), embedded deep in a System-On-a-Chip (SOC) circuit, to propose new ways for testing them as well as to provide new design methodologies for commonly used cores with enhanced testability features.

The research team involved in this project was composed by Dr. Vergos and the (at that time) PhD. candidates M. Bellos and Em. Kalligeros. Dr. Vergos' research mainly focused on the proposal of area-time efficient and easily testable cores. Dr. Bellos' research was focused on the test set embedding problem, using either counters or phase shifters. Finally, Dr. Kalligeros' research attacked the problem of minimizing the cycles and the hardware of LFSR pseudorandom testing.

The program ended on the November of 2003. The team's research resulted in 5 major journal and 10 international conference publications.

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