Journals
Publications
Journal Publications
- L. Kalampoukas, D. Nikolos, C. Efstathiou, H. T. Vergos and J. Kalamatianos, High-Speed Parallel-Prefix Modulo 2n-1 Adders, IEEE Transactions on Computers, Special Issue on Computer Arithmetic, Vol. 49, No 7, July 2000, pp. 673-680.
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- D. Bakalis, M. Bellos, K. Adaos, D. Lymperopoulos, H. T. Vergos, G. Alexiou and D. Nikolos, A Core Generator for Arithmetic Cores and Testing Structures with a Network Interface, Journal of Systems Architecture, Vol. 52, No. 1, January 2006, pp. 1-12.
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- H. T. Vergos and G. Dimitrakopoulos, On Modulo 2n+1 Adder Design, IEEE Transactions on Computers, Vol. 61, No. 2, February 2012, pp. 173-186.
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