H. T. Vergos - Professor

Chapters in Edited Books

• D. Nikolos and H. T. Vergos, On the Yield of VLSI Processors with on-chip CPU Cache, in Lecture Notes in Computer Science No. 1150, Edited by Andrzej Hlawiczka and Joao Gabriel Silva, (2nd European Dependable Computing Conference, EDCC-2, Taormina, Italy, Oct. 2-4, 1996), pp. 214-229, Springer - Verlag, ISBN: 3-540-61772-8.

• H. T. Vergos, D. Nikolos, P. Mitsiadis and C. Kavousianos, Reconfigurable CPU Cache Memory Design : Fault Tolerance and Performance Evaluation, in VLSI: Integrated Systems on Silicon, Editors Ricardo Reis and Luc Claesen, ("VLSI '97", IX IFIP International Conference on VLSI, August 26-30 1997, Gramado, Brazil), pp. 103 - 114, Chapman - Hall, ISBN:0-412-82370-5, ISBN-13: 978-04-128-2370-1.

• M. Bellos, D. Nikolos and H. T. Vergos, Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks, in Lecture Notes in Computer Science No. 1667, Edited by Jan Hlavicka, Erik Maehle and Andras Pataricza, (3rd European Dependable Computing Conference, EDCC-3, Prague, Czech Republic, September 1999), pp. 267 - 282, Springer - Verlag, ISBN: 3-540-66483-1.

• C. Ninos, H. T. Vergos and D. Nikolos, Design and Analysis of On-Chip CPU Pipelined Caches, in VLSI : Systems on a Chip ("VLSI '99", X IFIP International Conference on VLSI, December 1- 4 1999, Lisbon, Portugal), pp. 161-172, Kluwer Academic Publishers, ISBN: 0-792-37731-1.

• [Invited] E. Vassalos, D. Bakalis and H. T. Vergos, SUT-RNS Forward and Reverse Converters, VLSI 2010 Annual Symposium Selected Papers, Edited by : N. Voros, A. Mukherjee, N. Sklavos, K. Masselos and M. Huebner, Chapter 14, Springer-Verlag 2011, ISBN-13: 978-94-007-1487-8.