H. T. Vergos' Homepage

H. T. Vergos received his Diploma from the Computer Engineering and Informatics Department (CEID) of the University of Patras, in 1991 and his Ph.D. in 1996 for his research on fault tolerant cache memory architectures.

He then worked as an ASIC designer for Atmel Inc. on the development of the first worldwide IEEE 802.11 compliant medium access control processor and other network components. He rejoined CEID as a faculty member in 1999. He currently holds an Associate Professor position.

He is responsible for the "Digital Design I", "Digital Design II" and "E-CAD for Digital Hardware" courses of the undergraduate program and for the "Fault Tolerant Computer Systems" course for the graduate program. In the past he has taught several other courses and supervised a number of hardware laboratories.

His research interests include computer architecture and arithmetic, VLSI design and test, rapid prototyping of computer systems and graceful degradation in faulty environments. He serves as an invited reviewer in several well-known conferences and most accredited journals. He is a member of the IEEE and the Technical Chamber of Greece.